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Solution

Test and Measurement

Multi-channel digitizers with external clock and trigger on every model, for automated test systems and instrument OEMs.

An instrument company needs the digitizer to disappear into its own product: predictable channel counts, a documented API, and a board that is still available in three years.

The catalog is built around that. Channel counts run from one to eight per module at matched sample rates, the host API is the same across every form factor, and board-level customization - a different connector, a different channel count, your front panel - is a normal engagement rather than a special favor.

Signal chain

Where our hardware sits

Highlighted stages are the ones we supply.

  1. 01 Device under test your fixture
  2. 02 Signal conditioning yours or ours
  3. 03 Digitizer PCIe or FMC + carrier
  4. 04 Test executive documented API

Where to start

Products for this application

PCIe 250 MSPS Digitizer
PCIe PCIe 250 MSPS Digitizer Integrated 250 MSPS, 16-bit PCIe digitizer with on-board FPGA processing
Sample rate
250 MSPS
Resolution
16-bit

A complete digitizer rather than a carrier plus module: 250 MSPS, 16-bit, 2 GB/s to the host, with published SFDR and SNR.

FMC Modules FMC 8-Channel 250 MSPS ADC 8-channel 250 MSPS ADC, 16-bit, VITA 57.1 / 57.4 FMC module
Channels
8
Sample rate
250 MSPS

Eight matched 250 MSPS channels when channel count drives the design.

FMC Modules FMC 4-Channel 105 MSPS ADC 4-channel 105 MSPS ADC, 16-bit, VITA 57.1 / 57.4 FMC module
Channels
4
Sample rate
105 MSPS

The economical instrumentation channel: 105 MSPS at 16 bits, four channels.

COM Express Processing Carrier
Embedded COM Express Processing Carrier FPGA carrier with a COM Express Type 6 compute module
FPGA
XC7K325T / XC7K410T
Compute
COM Express Type 6

Turns the digitizer into a self-contained instrument with an on-board COM Express host.

Before you specify

Questions worth settling early

Are the datasheet numbers measured or calculated?
Measured. The 250 MSPS digitizer is specified at SFDR >= 80 dBFS and SNR >= 65 dBFS at Fin = 187.5 MHz, and every design is characterized before release.
Can we get it with our own front panel and connectors?
Yes, and that is the most common customization we do. Connector changes, channel-count changes and front-panel changes sit on an existing platform, so they do not restart qualification from zero.
What is the lifecycle commitment?
Hardware and firmware versions are frozen at design freeze and managed under change control from that point. Talk to us early about program length and we will put the lifecycle terms in the quote.
Not sure which end of the range you are in?

Send the bandwidth, channel count and run length. Typical response within one business day.

Ask us

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